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Job Description
Join a leading Multinational Semiconductor Telecom Organisation as a Contract Senior RTL Design Engineer. Work 100% remotely and translate signal processing algorithms into synthesizable RTL code.
Main responsibilities:
- Develop a new decoder block for high performance reception
- Propose a micro-architecture, Verilog coding, simulation, and verified block for die size reduction
- Integrate the new block into different Wi-Fi IP versions
- Support the UVM team for debugging
Requirements:
- Engineering Degree in Computer Sciences
- 8+ years of experience in digital design
- Ability to follow a design flow (RTL, testbench, code coverage, synthesis, formal verification, gate level simulation)
- Highly experienced in Verilog
- Strong background in communication theory and digital signal processing, particularly OFDM and MIMO technologies
- Familiar with Matlab
- Excellent written communication skills in the form of Functional, Design, and Test Plan Documentation
- Excellent communications and interpersonal skills, English required
- Ability to work in a multi-disciplined team environment
Contact: For further information, please contact Mícheál at Software Placements on 00353 1 5254642 or email micheal@softwareplacements.ie.