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Job Description
As a CPU Verification Engineer, you'll work with Chip Architects to validate CPU and SOC level micro-architectures. You'll ensure the CPU Design Verification functions to launch-ready standards for the end product.
Responsibilities:
- Work with CPU and SOC Architects to understand concepts and high-level system requirements.
- Develop detailed Test and Coverage plans based on Architecture and Micro-architecture.
- Develop Verification Methodology, ensuring scalability and portability across environments.
- Develop Verification environment, including Stimulus, Checkers, Assertions, Trackers, and Coverage.
- Develop Verification Plans and Testbenches for your functional domain.
- Execute Verification Plans, including Design Bring-up, DV environment Bring-up, Regressions enabling all features under your care, and Debug of the test failures.
- Track and report DV progress using a variety of metrics, including Bugs and Coverage.
Requirements:
- Deep knowledge of Micro-Processor Verification functions and Architectures, in domains such as Cache Coherence, Memory ordering and Consistency, Prefetching, Branch Prediction, Renaming, Speculative execution, and Address Translation/Memory Management.
- Knowledge of Random Instruction Sequencing (RIS) and testing a given design, at the Block/Unit-level and Subsystem/Chip-level for proving correctness.
- Experience in leading a small team of Verification engineers performing CPU Verification.
- Advance techniques such as Formal, Assertions, and Silicon bring up, is helpful.
- In-depth knowledge of Micro-processor functions, Architectures, and Micro-architectures.
- Experience in writing Test plans, portable Testbenches, Transactors, and Assembly code.
- Experience with different Verification Methodologies and Tools such as Simulators, Coverage collection, Gate-level Simulation, Waveform viewers, and Formal Proof Tools.
- Ability to develop and work independently on a Block/Unit of the design.
Qualifications:
- Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
- OR Master's degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience.
- OR Ph D in Science, Engineering, or related field.
Benefits:
- Salary, stock, and performance-related bonus.
- Maternity/Paternity Leave.
- Employee stock purchase scheme.
- Matching pension scheme.
- Education Assistance.
- Relocation and immigration support (if needed).
- Life, Medical, Income, and Travel Insurance.
- Subsidised memberships for physical and mental well-being.
- Bicycle purchase scheme.
- Employee-run clubs, including running, football, chess, badminton, and many more.