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Job Description
Chipright seeks an experienced ASIC Mixed-Signal Verification Engineer to verify digital and mixed-signal design blocks. The ideal candidate will take full responsibility for verification of a design, define and implement UVM based test environments, break down requirements and create verification specifications and test cases, develop, run and debug test cases, and use real-numbered analog behavioral models in System Verilog/Verilog-AMS or electrical behavioral models in Verilog-A, with signal processing using Matlab. Key responsibilities include:
- Take full responsibility for verification of a design, being block or sub-system
- Define and implement UVM based test environments
- Break-down Requirements and create Verification Specifications and defining test cases
- Develop, run and debug test cases
- Using real-numbered analog behavioral models in System Verilog/Verilog-AMS or electrical behavioral models in Verilog-A
- With signal processing using Matlab
- Several years' experience from verification using System Verilog and UVM
- Experience in developing verification test plans and directed/randomized test cases
- Experience in Mixed Signal Verification