Principal Verification Engineer - Cadence Design Systems
  • Cork, Munster, Ireland
  • via BeBee.com
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Job Description

Principal Verification Engineer role in Cork, Ireland, responsible for developing and leading verification environments for complex protocols and driving adoption of formal methodologies.

Cadence is a leading provider of electronic design automation (EDA) software and intellectual property (IP) solutions. The company's Silicon Solutions Group (SSG) develops and delivers industry-leading IP solutions for various high-tech markets.

The Principal Digital Verification Engineer will be part of an experienced controller IP team and will be responsible for:

  • Architecture of verification environments for existing complex protocols IP such as CXL, CXS, PCIe and the cutting edge of the latest UCIe technologies.
  • Lead development of Formal First methodologies and drive adoption/implementation using industry leading tools such as Jasper Gold.
  • Development of System Verilog assertions, assumptions and covers for use in Formal and Simulation Environments.
  • Experience creating Formal properties from Protocol specifications.
  • Closely collaborate with Design Engineers to debug complex test scenarios.
  • Development of UVM-SV Scoreboards for self-checking regressions.
  • Development of Functional Coverage as part of Metric Driven Verification Environments.
  • Definition and Management of Verification Plans (v Plans) using Cadence v Manager tools.
  • Creation and Management of Automated Regression Environments, e.g. Jenkins.
  • Participation in Technical Review Meetings and Checklist Reviews as part of ISO-9001.

The ideal candidate will have:

  • Degree in Electrical/Electronic Engineering, Microelectronics, or a related discipline.
  • 10+ years' experience in microelectronics/EDA industry.
  • Experience of Verilog RTL Design essential.
  • Experience of Metric Driven Verification (MDV) an advantage.
  • Experience of Front-end design tools covering LINT, Synthesis, CDC Analysis an advantage.
  • Experience of SoC Architecture and Development an advantage.
  • Experience of Technical Team leadership an advantage.

Cadence is committed to equal employment opportunity and employment equity throughout all levels of the organization. We strive to attract a qualified and diverse candidate pool and encourage diversity and inclusion in the workplace.

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