Job Description
**Design Verification Manager** We are seeking a highly skilled and motivated Design Verification Manager to lead a team of talented engineers in verifying the functionality, performance, and robustness of complex designs. **Job Summary** Lead a team of design verification engineers, develop comprehensive verification strategies, and drive the adoption of state-of-the-art verification methodologies to enhance efficiency, scalability, and quality. **About the Role** We are a multi-award winning team that has developed the RF data converter sub-system, including direct-RF digital signal processing, around which Zynq Ultrascale+ RFSo C is built. As a Design Verification Manager, you will play a critical role in ensuring the quality and reliability of our cutting-edge semiconductor products. **Key Responsibilities** * Lead and mentor a team of design verification engineers, fostering a culture of innovation, collaboration, and continuous improvement. * Develop and execute comprehensive verification strategies for highly complex semiconductor designs, ensuring thorough coverage of functional requirements and compliance with industry standards. * Define project plans, schedules, and resource allocations, effectively managing priorities and dependencies to meet aggressive product development timelines. * Collaborate closely with design, architecture, and software teams to drive alignment on verification goals, resolve technical challenges, and ensure successful product tape-outs. * Drive the adoption and evolution of state-of-the-art verification methodologies, tools, and best practices to enhance efficiency, scalability, and quality. * Establish and enforce rigorous quality assurance processes and metrics, conducting reviews and audits to identify and mitigate risks throughout the verification lifecycle. * Promote a culture of continuous improvement, proactively identifying opportunities to streamline workflows, optimize processes, and enhance team productivity. **Requirements** * Bachelor's degree in Electrical Engineering, Computer Engineering, or related field (Master's degree preferred). * 8+ years of experience in ASIC or So C design verification, with a proven track record of successfully leading verification teams through multiple tape-out cycles. * Strong technical expertise in verification methodologies such as UVM, System Verilog, and formal verification techniques. * Proficiency in scripting and programming languages (e.g., Python, Perl, TCL) for testbench automation and data analysis. * Excellent communication and interpersonal skills, with the ability to effectively collaborate with cross-functional teams and influence technical decisions. * Demonstrated leadership capabilities, including team building, coaching, and performance management. * Experience with industry-standard EDA tools and design flows (Cadence, Synopsys, Mentor Graphics) is highly desirable.