Senior Engineer, Design Verification Engineering - Analog Devices
  • Munster, Munster, Ireland
  • via ClickaJobs (1)
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Job Description

Analog Devices, Inc. (NASDAQ: ADI) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, and software technologies into solutions that help drive advancements in digitized factories, mobility, and digital healthcare, combat climate change, and reliably connect humans and the world. With revenue of more than $12 billion in FY22 and approximately 25,000 people globally working alongside 125,000 global customers, ADI ensures today’s innovators stay Ahead of What’s Possible. Position: Senior Analog Design Verification Engineer Location: Limerick, Ireland Location: Ismaning, Germany Business Unit: Instrumentation (INS) Group: Precision Amplifier Group (PAG) Hiring Manager: Simon Basilico Group Description: The Precision Amplifiers Group develops next generation precision sensing and signal conditioning ICs for a broad range of industrial and instrumentation multi markets. We also have an adjacent focus on Scientific Instruments end market, helping transform molecules into insights in applications such as food safety, air and water quality, drug discovery & development, as well as genetic sciences. As our real-world analog signal processing capabilities advance, there is an increasing demand for ultra-high precision signal conditioning solutions. To achieve this goal, our team of analog and digital designers work on ground-breaking products by merging cutting-edge process technologies with advanced IC design techniques. The Precision Amplifier Group is seeking an experienced Senior level Analog Design Verification Engineer to join our European development team. Responsibilities: The Analog Design Verification team is responsible for ensuring a circuit design performs according to the product’s technical specifications over the required conditions. To accomplish this, the Analog Design Verification team must fully understand the product requirements and specifications, architect testbenches appropriate to the design IP, and write test case code to determine pass/fail conditions as part of a Metric Driven Verification methodology. The key functions include, but are not limited to: Transistor-level circuit simulations over corner including PVT, loading conditions, and Monte Carlo Understanding of semiconductor device level operation & physics. Behavioral modelling to enable comprehensive, top-down, metric-driven verification of new analog designs. Working together with a broad team of engineers distributed across the globe. Leveraging existing design verification IP to enable full coverage of new designs. Supporting other job functions such as board design, lab evaluation and test to ensure successful delivery meeting key requirements. Requirements: Excellent knowledge of analog and mixed-signal circuit design, tools, and flows. Experience with scripting languages such as Python, Tcl, or Perl. Experience in stability of feedback systems and compensation techniques. Experience in bipolar circuit design and/or high-speed amplifiers is a plus. Knowledge of precision metrics such as mismatch, noise & linearity is a plus. Design experience in amplifiers circuits, DACs, ADCs, bandgaps, or bias circuits is a plus. Minimum Qualifications: MS / PhD degree in EE or ECE with focus on analog/mixed signal design with 3+ years of relevant industry experience. Preferred Skills & Experience: Knowledge of standard verification flows including UVM, testbench automation, coverage-based metrics is a plus. Knowledge of verification languages like Verilog/Verilog A, SystemVerilog, Verilog-AMS, System-C, etc. is a plus. Experience with C++ and Matlab. Strong presentation and technical documentation skills. Strong analytical and problem-solving skills with attention to detail. Self-motivated, thorough, autonomous, and driven to continually improve. Job Req Type: ExperiencedRequired Travel: Yes, 10% of the timeShift Type: 1st Shift/Days #J-18808-Ljbffr

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